For variable assignment in make, i see := and = operator. The error that you've quoted must have been preceded by an error from gcc, please quote that as well. What's the difference between them?
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If this file name was /bin/make, then the recipe executed is cd subdir. That is to say: make sb do sth=make sb to do sth. In other words, i want to pass some arguments which will eventually become variables in the makefile.
By using 'gmake' specifically you can use gnu make extensions.
Msys2 have many types of runtime and they. Can i pass variables to a gnu makefile as command line arguments? Anyway, there are several options for getting. The following is a summary of the usage of make that I have compiled for you. I hope it can help you better understand the word make and improve your English level. Usage and phrases of make 1. Compound object of make. The word make is used in many ways in English, and it is used most frequently.
Cd subdir && $(make) the value of this variable is the file name with which make was invoked. Make is a gnu command, so the only way you can get it on windows is installing a windows version like the one provided by gnuwin32. The language accepted by gnu make is a superset of the one supported by the traditional make utility. Second, make sb do sth means "to make someone do something", which often means forcing someone to do something, such as: our boss.
